Time Table


10:00



10:50
  Greetings from Chairman, the executive committee of Design Solution Forum 2015
   
  Michihiro Okada
Chairman, the executive committee of Design Solution Forum 2015
KYOCERA Document Solutions
   
  Keynote
   
 

Surviving Semiconductor Manufacturers


Yukio Sakamoto
WIN CONSULTANT

speaker


 
11:00

11:35

Advanced Design Technologies Using HLS Solutions


Masato Tateoka
Socionext Inc.

IoTDeviceVerification


Naoya Morita
Ricoh Company, Ltd.

Let's try various applications of the LLVM Compiler Infrastructure


Toshihiro Wakatsuki
Kyoto Microcomputer Co.,LTD.

From VLSI Design Technology toward CPS Design Technology
– Recent Trends of Application Design Methodologies


Ittetshu Taniguchi
Ritsumeikan University

Meeting to Discuss High-level Synthesis

What to Do with High-level Synthesis? What Is It Best to Do?


【Moderator】
Harunobu Miyashita
Fuji Xerox Co., Ltd.

DSF Verification Study Group

What Is Verification!?


【Moderator】
Takashi Kawabe
Konica Minolta, Inc.

 
11:45

12:05

Magillem provide the solution linking all of design resources.


Koji Nakamura
TOSHIBA INFORMATION SYSTEMS (JAPAN) CORPORATION

MAGILLEM JAPAN

The New Generation FPGA Debugging Tool VSTAR - Replacing Conventional On-Chip Logic Analyzers -


Isao Shimamoto
Verification Technology , Inc.

20th Anniversary: Now is the time to adopt “Synplify Premier”, the advanced FPGA synthesis tool


Eri inoue
Nihon Synopsys G.K.

Enabling an intelligent system design flow “in a day” with the Socrates DE, CoreSight Creator and CoreLink Creator.


Satoshi Nakajima
ARM K.K

 
12:15

12:50

Toward the realization of the seamless verification environment for "camera system".


Norihisa Matsumoto
Nikon Corp.

Hardware verification history


Akira Misumi
Fuji Xerox Co., Ltd.

Acceleration Technology during Concurrent Software Run Verification


Yoshitaka Arahori
Tokyo Institute of Technology

Development of the new standard interface(Cool Pepper®) for low power consumption mobile devices


Shinya Suzuki
CerebrEX, Inc.

High-Level Synthesis Tutorial

Simple FPGA Development Tutorial with Zynq+Synthesijer Hands-on Java


【Moderator】
Takefumi Miyoshi
Wasarabo G.K

 

Formal Verification Talk
(12:15-13:25)

Ideals and Realities for Formal Verification: Is This Suitable with Dynamic Verification?


【Moderator】
Mitsuhiro Okada
KYOCERA Document Solutions Inc.

13:00

13:20

Architecture design and virtual prototyping by Vista


Takefumi Namiki
Cybernet Systems Co., Ltd.

The Formal Verification of High Reliability Designs


David Kelf
OneSpin Solutions Japan K.K

Prodigy Complete Prototyping Platform


Tomoyuki Tsuji
S2C Japan Co.,LTD

Developing Vision Recognition System using Neural Network Processor IP


Masaaki Ideno
Nihon Synopsys G.K.

 
13:35

13:55

To realize power and thermal analysis and low power products with Docea


Tsunemori Kawahara
DOCEA POWER / Intel Corporation

KK Nextream

The Shift-Left: Verification Methodology and Next Generation Verification Environment


Hitoshi Kurosaka
Nihon Synopsys G.K.

New technology engine for next-generation FPGA development tool


Tetsuro Fukuhara
Altera Japan, Ltd.

Future of Image Recognition


Kazuyoshi Hibino
Nihon CEVA K.K

     
14:05

14:40

Crucial point of high performance system design


Tetsuro Kitamura
KYOCERA Document Solutions Inc.

Cases of Building Co-verification Systems Using Virtual Environments and FPGA


Yoshinori Nakamura
Renesas System Design Co., Ltd

Effect and performance of high-level synthesis tool Vivado HLS in Xilinx's FPGA


Masaaki Ono
University of Tsukuba

Verification environment solutions for improving the management quality of verification


Takashi Kawabe
Konica Minolta, Inc.

   

Prototype Developement Talk
(14:05-15:15)

Peering into the Threshold of Virtual and Real


【Moderator】
Sadahiro Kimura
Ricoh Company, Ltd.

14:50

15:10

Leveraging the Power of Engineers: Grasping the Skills of Engineers and Human Resource Utilization


Makoto Sasaki
Pasona Tech, Inc

Hardware-Software Co-verification for Successful Custom SoC Projects


Devendra Godbole
Open-Silicon, Inc.

Recommendation of “preparation of specification documentation” ~ For an approach to quality improvement ~


Sanae Saito
CM Engineering Co., Ltd

OmniSheld : Total Security Solutions for Next-generation SoC


Michio Abe
Imagination Technologies KK

   
15:25

16:00

A Hardware Development with C Source Code Visualization Method


Hirofumi Takamoto
Legato design corporation

Guidance to a success based on the failure example in product development


Takahiro Mori
TOSHIBA MICROELECTRONICS CORPORATION

Latest trends on multicore tools and a case-study


Masaki Gondo
eSOL Co.,Ltd.

Aiming a simple and short TAT design by information sharing on the front-end


Kenichi Ozawa
Ricoh Company, Ltd.

Meeting to Discuss High-level Synthesis

What to Do with High-level Synthesis? What Is It Best to Do?


【Moderator】
Harunobu Miyashita
Fuji Xerox Co., Ltd.

DSF Verification Study Group

What Is Verification!?


【Moderator】
Takashi Kawabe
Konica Minolta, Inc.

 
16:10

16:30

The Shift-Left: Prototyping Solutions from System to HW/SW Design


Junji Nakano
Nihon Synopsys G.K.

Cadence Functional Safety solution for ISO26262


Kenji Goto
Cadence Design Systems, Japan

Advanced solution of automatic parallel source code generation from traditional sequential C source code


Tsunemori Kawahara
Silexica Software Solutions GMBH

KK Nextream

Enabling Hardware Acceleration Using FPGA for Software Engineers


Seiichi Kuroda
Xilinx Inc

 
16:40

17:15

IoT3.0 Global Strategy: Building IoT Future Society Infrastructure


Yoshihisa Toyosaki
IP500Alliance e.V. Chapter Japan

Ethernet Access for Zynq


Tadaaki Koyama
FPGA Information Ltd.

C-Based RTL Design Framework for Application-Specific Instruction-Set Processors and Hardware-Ips


Tsuyoshi Ishiki
Tokyo Institute of Technology

Masaya Shida
Socionext Inc.