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10:50
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11:30 |
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The pursuit of consistency on MFP SoC Development with SysML
Mamoru Kani KYOCERA Document Solutions |
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The way to the software driven verification
Harunobu Miyashita Fuji Xerox |
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The FPGA prototyping with V7 TAI Logic Module
Shuntaro Seno Hitachi |
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The merged software development and SoC verification like this!
Tatsuro Miyakawa FUJITSU SEMICONDUCTOR |
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The SystemVerilog Hackathon
<Moderator>
Harunobu Miyashita DSForum Committee Member Fuji Xerox |
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11:40
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12:00 |
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Solve issues by seeing differences between ASIC and FPGA design flow
- CME provides best design frlow -
Seiichi Futami CM Engineering |
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The introduction of Atrenta's new solution, BugScope and SpyGlass FPGA-Kit
Nobutaka Ogiya Atrenta |
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The high-performance scalable FPGA-based prototyping solution
Tomoyuki Tsuji S2C Japan |
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The development of low-power object recognition processor on ASIP
Masaaki Ideno Nihon Synopsys |
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12:10
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12:50 |
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「The HLS Talk」
The HLS recommendation by major tool vendors
<Moderator>
Takashi Kawabe DSForum Committee Member Konica Minolta |
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The pincer drive from upstream and downstream
Example of reducing development time on the large FPGA with verification
Yoshimasa Ishino Mitsubishi Electric Micro-Computer Application Software
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The introduction of debug method with an actual case
Kunihiko Tsuji Kyoto Microcomputer |
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The virtual environment building with QEMU
Hiroyuki Tomiyama Ritsumeikan Univ. |
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13:00
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13:20 |
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The effect and applicable domain of virtual prototyping
Kentaro Yasuda Nihon Synopsys |
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The approach to performance verification
Tsuyoshi Yamaguchi Verification Technology |
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HyperX - the next generation parallel processor
Takashi Hirano Coherent Logix |
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The improvement by required life-cycle management for safety-critical FPGA and ASIC design
Takeshi Miyajima Aldec Japan |
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13:30
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13:50 |
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The overview and success stories of HLS / verification system CyberWorkBench for ANSI-C and SystemC
Kazutoshi Wakabayashi NEC |
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The 100% cycle accurate mode-based ESL tool "Carbon SoC Designer+" and cloud-based model creation site"Carbon IP Exchange"
Toshihisa Oishi Carbon Design Systems Japan |
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The introduction of Xilinx All Programmable Abstraction
Kazunori Toyama Xilinx |
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The unified flow building with consistency between RTL and UPF/SDC/IPXACT models
Rikuichi Kishimoto DEFACTO Technologies |
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14:00
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14:40 |
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The HLS for ultrafast transport system
Masao Nakano FUJITSU KANSAI-CHUBU NET-TECH
Shingo Kuroda FUJITSU Microelectronics Solutions |
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「The Verification Talk」
The verification business to activate Japanese industry
~The forecast by verification "Takumi" about the direction of the future verification business
<Moderator>
Hirohisa Kotegawa DSForum Committee Member
FUJITSU SEMICONDUCTOR
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NoiseWiper, IP verification with Zynq
Kazuhiro Hiramoto Morpho |
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Open source and HLS processing, Synthesijer
- in an effort to easy FPGA development with Java -
Takefumi Miyoshi Wasa-Labo |
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14:50
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15:10 |
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The analysis of power and thermal on early stage of design and early development of power / thermal aware software by DOCEA POWER
Tsunemori Kawahara Nextream |
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The comprehensive formal verification: the integration of the latest formal tool, VC Formal and Certitude from Synopsys
Yukio Mogi Nihon Synopsys |
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The latest Altera Arria 10 SoC with ARM processors and development method for software designer
Takayuki Oyama Altera Japan |
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The approach to design high performance SoC effectively in short period
Kazuyoshi Okazaki Imagination Technologies |
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15:20
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16:00 |
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The challenges on MATLAB/Simulink model implementation to hardware and software
Mutsumi Saito FUJITSU KYUSHU NETWORK TECHNOLOGIES |
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The eexamples of UVM verification environment building with IP-XACT
Ken-ichi Ozawa Ricoh |
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「The Software-Test Talk」
The test-aware HW/SW design
<Moderator>
Tsuji Kunihiko DSForum Committee Member Kyoto Microcomputer |
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The improving the field power! The challenges and engineer cultivating on large development era
Takashi Kawabe Konica Minolta |
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16:10
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16:30 |
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The layout design examples and methods on the advanced system LSI
Seiichiro Horiike Alchip Technologies |
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The latest IP-XACT application examples: Introduction of auto-building of verification environment and full-synchronization of specification and design
Tsunemori Kawahara Nextream |
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The debug method and features for FPGA-based prototyping
Fujio Otsuka Nihon Synopsys |
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The computer-vision specific DSP and its development environment
Masayuki Shirahama Nihon CEVA |
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16:40
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17:20 |
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The system verification examples on EXPEED development
Ryo Takami / Norihisa Matsumoto Nikon |
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How to improve verification quality for 1 chip
- The application examples of formal functional verification -
Toshiya Uenishi Renesas System Design |
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The software designer- driven hardware design examples
Naoya Morita Ricoh |
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「The IP Talk」
What's user-friendly IP?
<Moderator>
Sadahiro Kimura DSForum Committee Vice Chairman
Ricoh |
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