Time Table


9:30



10:25
  Greetings from Chairman, the executive committee of Design Solution Forum 2016
   
  Sadahiro Kimura
Chairman, the executive committee of Design Solution Forum 2016
Ricoh Company, Ltd.
   
  Keynote
   
 

Agile development of IoT for global niche market


Kenichi Matsumoto
CTO
Cerevo Inc.

speaker



 
4F "Blue Plum"

3F "Henry House"

4F "Hilltop"

3F "Chester House"

4F "Centuries"

4F "Olive"

2F "Queen's Hall"
10:35

11:15

Innovation to Software Oriented SoC Verification


Ryosuke Yamazaki
Socionext Inc.

Applications of AHCI as An Interface between PC and FPGA


Takefumi Miyoshi
WasaLabo, LLC./e-trees.Japan, Inc.

Forefront of Test Environment Applying Virtual ECU
– Most Recent Use Cases for Safety Verification of Automotive In-vehicle Electronic Control Systems -


Yoshihiro Miyazaki
Hitachi Automotive Systems, Ltd.

Deep learning 101 for engineers


Eisaku Ohbuchi
Digital Media Professionals Inc.

Let's discuss about High Level Synthesis(first half)
9:40-11:40

 

【Moderator】
Harunobu Miyashita
Fuji Xerox Co., Ltd.

DSF Verification Study Group

What Is Verification!?(first half)

10:35-11:45


【Moderator】
Takashi Kawabei
Konica Minolta, Inc.

 
11:25

11:45

Power Optimized System Architecture and SW Design with Virtual Prototyping


Junji Nakano
Nihon Synopsys G.K.

Give instruction "how to verify about the verification of FPGA"


Tomofusa Nomura
CM Engineering Co.,Ltd.

An innovative solution for parallel software generation for heterogeneous multicore architectures


Naoya Morita
KK Nextream
Silexica

Tensilica Vision P6 DSP - Optimum for Computer Vision and Neural Network Applications


Yusuke Matsuoka
Cadence Design Systems, Japan

 
11:55

12:35

How to Perform Highly Efficient Verification of MCU Design – Part 2
- A New Top-Down Approach with Software-Driven Technique -


Toshiya Uenishi
Renesas System Design Co., Ltd.

FPGA Development using HLS for Software Engineers


Kenichiro Mitsuda
Research Institute of Systems Planning, Inc.

Modeling for autonomous driving system - Introduce the difference between program and rule-based and deep learning -


Masahiko Watanabe
CATS co. ltd.

Machine Intelligence at Google Scale


Kazunori Sato
Google

Software Related Session 1
(first half)
11:55-13:15


【Moderator】
Software Planning Unit
the executive committee of Design Solution Forum

Software Related Session 2
(first half)
11:55-13:15


【Moderator】
Software Planning Unit
the executive committee of Design Solution Forum

Talk Session 1

Hardware Engineers vs Software Engineers Talk
~Exploring the hint of problem solving that can be used from tomorrow~
11:55-13:05


【Moderator】
Tetsuo Yano
Mitsubishi Electric Corp.

12:45

13:05

ARM Models and ARM Virtual Prototyping solutions


Toshihisa Oishi
ARM K.K.

C-Based HW/SW Implementation on Embedded FPGA Using SDSoC


Seiichi Kuroda
Xilinx K.K.

Building up IoT environment for the micro computer incorporated ARM® mbed™ OS


Eiichi Saigusa
NIPPON SYSTEMWARE CO.,LTD.

Introducing latest Deep Learning technology trend and “EV6x”


Masaaki Ideno
Nihon Synopsys G.K.

13:20

13:40

TBD


Naoya Morita
KK Nextream
SmartDV Technologies India Private Limited

The new standard for IoT evolution! Find the definitive solution for ARMv8 base SoC development environment with Juno ARM / HAPS-80


Kazunori Toyama
Nihon Synopsys G.K.

Satoshi Nakajima
ARM K.K.

Total Secure Solution for IoT : OmniShield


Michio Abe
Imagination Technologies KK

CEVA Embedded DNN Solution


Seiichi Horie
Nihon CEVA K.K

     
13:50

14:30

Yes, we can! Be a founder of formal verifier.


Takanori Shiraishi
KYOCERA Document Solutions Inc.

Customizable High-Level Design Methodology by Python


Shinya Takamaeda
Hokkaido University

Software development environment in the multi-core with using SILEXICA


Sadahiro Kimura
Ricoh Co., Ltd.

What kind of problem can be solved by OpenCV


Norishige Fukushima
Nagoya Institute of Technology

Software Related Session 1
(last half)
13:40-15:00


【Moderator】
Software Planning Unit
the executive committee of Design Solution Forum

Software Related Session 2
(last half)
13:40-15:00


【Moderator】
Software Planning Unit
the executive committee of Design Solution Forum

Talk Session 2

Emulator vs FPGA
13:50-15:00


【Moderator】
Hirohisa Kotegawa
Socionext Inc.

14:40

15:00

Real Intent's Static Solution can accelerate/strengthen your current solution.


Kazutaka Kanda
Real Intent Japan, Inc.

FPGA top-down debugging methodology using the debugging tool VSTAR


Yoshinori Hazaka
Verification Technology, Inc.

Virtual Prototyping Solutions for Optimal Power and Thermal on mobiles and high intensive computing devices such as 4K/8K UHD video products


Tunemori Kawahara
KK Nextream
Intel/Docea

Streamlining the C++ Implementation of a Sobel Filter


OneSpin Solutions Japan K.K

15:15

15:55

The evaluation and the validation of the Auto Formal Verification tools


Katsuhisa Ikeuchi
NEC Corporation

FPGA development case by the C language with SDSoC


Tadaaki Koyama
FPGA Information Ltd.

IoT with Open Source Software


Teppei Asaba
FUJITSU COMPUTER TECHNOLOGIES LIMITED

Algorithm Development for Image Processor:What To Do and Not To Do


Mari Ohbuchi
NIKON CORPORATION

Let's discuss about High Level Synthesis(last half)
15:15-17:15

 

【Moderator】
Harunobu Miyashita
Fuji Xerox Co., Ltd.

DSF Verification Study Group

What Is Verification!?(last half)

15:15-16:25


【Moderator】
Takashi Kawabei
Konica Minolta, Inc.

 
16:05

16:25

JasperGold CDC:A New Formal App for CDC(Clock Domain Crossing) Verification to Suppress False Error Messages


Reiko Shiga
Cadence Design Systems, Japan

Munufacturing Strategy beyond IoT era


Tetsuya Fujita
Zsas inc.

Security vulnerability management for software development eco-system of connected devices


Tadashi Tsumura
Nihon Synopsys G.K.

Next Generation C-based System-on-Chip Design & Verification Solution


Tsuyoshi Isshiki
New System Vision Research and Development Institute (NSV), Board of Directors Tokyo Institute of Technology, Global Scientific Information and Computing Center, Professor

 
16:35

17:15

Toward automated and integrated verification environment
~requirement oriented verification methodology~


Sei Yamagishi
FUJITSU CIT LIMITED

FPGA computing


Yoshikazu Shinoda
Vectology,Inc.

TBD


Yoji Shimizu
TechanaLye

Xilinx SDSoC implementation case example and MPSoC demo description


Wataru Takahashi
OKI IDS Co., Ltd.

   


17:35

19:30
  Reception Party
   
  Pre-registration is required.